AMD has confirmed Zen 6, codenamed “Morpheus,” as its next CPU microarchitecture, succeeding Zen 5. The architecture was shown on AMD’s roadmap in July 2024 and is expected to use TSMC’s 2 nm process for CCDs and 6 nm for the IOD. AMD has set datacenter launches for July 23, 2026, with desktop parts expected in H1 2027.
What changed: AMD confirmed Zen 6, codenamed “Morpheus,” will succeed Zen 5 with up to 12 cores per CCD, with datacenter launches set for July 23, 2026 before desktop parts follow. Why it matters: The architecture adds new AVX instruction extensions and is expected to be AMD’s first platform with Flexible Return and Event Delivery. Who should care: Desktop buyers planning an AM5 upgrade and anyone tracking the silicon expected in the next consoles.
Core Counts and Platform Segmentation
Zen 6 scales significantly across product tiers. Each Core Complex Die (CCD) will contain up to 12 cores.
| Platform | Core count |
|---|---|
| Consumer desktop platforms | maximum of 24 cores (48 threads) |
| Server platforms | up to 256 cores (512 threads) |
| Mobile chips | up to 26 cores |
| HEDT/Workstation parts | 36 to 144 cores |
Desktop processors will use Socket AM5 and are codenamed “Olympic Ridge,” expected to launch under the Ryzen 10000 brand. Server processors, codenamed “Venice,” “Venice-X,” “Venice LP,” and “Verano,” will use the SP7 and SP8 sockets. HEDT/Workstation Threadripper parts, codenamed “Mustang Peak,” will use Socket sTR6. Mobile codenames include “Bumblebee,” “Medusa Point,” “Medusa Halo,” and “Gator Range.”
Architecture and Instruction Set
Zen 6 carries the CPUID family designation 1Ah and supports DDR5DDR5. A generation of system RAM (memory); newer and faster than DDR4. memory. L1 cache is 80 KB per core (32 KB instructions, 48 KB data), L2 cache is 1 MB per core, and L3 cache is 48 MB per CCD.
The architecture introduces new instruction extensions: AVX512_BMM, AVX_NE_CONVERT, AVX_IFMA, AVX_VNNI_INT8, and AVX512_FP16. Zen 6 is also expected to be the first AMD platform supporting Flexible Return and Event Delivery (FRED), replacing the legacy IDT mechanism.
Variants and Console Integration
Three variants are planned.
- Standard Zen 6 (“Morpheus”) — targets desktop and mainstream segments.
- Zen 6c (“Monarch”) — is a high-core-density variant for server and likely mobile platforms.
- Zen 6 LP — is a new low-power variant—a condensed, underclocked form of Zen 6c retaining the same IPC and instruction sets, designed for background tasks and hybrid sleep.
Zen 6 LP is expected to appear in mobile chips, handheld APUs, the upcoming PlayStation 6 console and handheld SoCs, and the next Xbox console’s SoC.
Next read
- For the architecture Zen 6 replaces, see AMD Zen 5 Microarchitecture Powers Ryzen 9000 Series.
- For how cache placement reshaped AMD’s gaming chips, see Cache Under the Cores.
- For AMD’s current graphics architecture, see AMD Unveils RDNA 4 Architecture at CES 2025.